4.2 Background This research project is an offshoot of a previous effort to design sub-mm3 autonomous microrobots for a novel programmable matter system [4, 5]. During the earlier effort, the need to manufacture large numbers of sub-mm3 microdevice packages arose. Desired characteristics included transparency to visible light, compatibility with existing solid state manufacturing processes, and a spheroidal shape. While originally envisioned for use in microrobotics, the capabilities of the proposed microstructure make it suitable for packaging a wide variety of devices, such as wireless sensors, energy harvesting and storage mechanisms, and processors [1, 5]. 4.3 Approach A previous attempt at spherical packaging involved the use of residual stress bending between Si and SiO2 layers to curl the shell around a central device [4, 5]. However, problems arose with low process throughput, insufficient surface area coverage, and microdevice mounting. Therefore, the current method, which encloses a microdevice between two thin hemispheres patterned on separate silicon wafers, was proposed. The chosen method was inspired by a similar process described by Wise, et al., who sought to develop a cheaper method of producing inertial-confinement fusion pellets in the late 1970s [6]. However, the aforementioned research effort never successfully demonstrated the production of spherical packages, potentially due to limitations in manufacturing technology at the time. In recent years, technological advancements in silicon etching, photolithography, and microdevice packaging have made achieving this goal a more feasible proposition. Nevertheless, to successfully mass fabricate spherical packages, each fabrication step must be investigated and perfected. 4.4 Methodology The experimentation process began with the patterning of circular etch holes on highly doped silicon wafers. Masking of wet Hydrofluoric/Nitric/Acetic Acid (HNA) etches was performed by a hard mask of Si3N4/SiO2 similar to that presented in [7]. The dry reactive ion etching (RIE) was masked by a single layer of SU-8 2025 photoresist. The etch rates and profile uniformities of wet etching in HNA were compared with those produced via RIE with an SF6-based plasma. Additionally, the impact of silicon crystal orientation on the isotropic etches was analyzed. White light interferometry (IFM), optical imaging, and scanning electron microscopy (SEM) were used to characterize the etch results. A MatLab image processing routine was developed and incorporated into etch analysis to determine the variance in cavities across sample surfaces. After characterizing the different isotropic etching methods, fabrication techniques for subsequent process steps were investigated. A wet HNA polishing step was utilized to reduce cavity undercut, surface roughness, and anisotropy. Photolithographic patterning was attempted over the severe topography of the cavities. Finally, a novel process for precisely patterning non-uniformly etched wafers was developed to increase process throughput. However, the complete envisioned fabrication process contains many processes which were not addressed in this research. A schematic of the full proposed fabrication process is shown in Fig. 4.1. Further research must be conducted into 3D photolithography and localized thermal bonding techniques to bring the envisioned packaging scheme closer to reality. Due to its prevalence in literature, HNA was chosen as the first isotropic etch to investigate. The HNA etchant system was first described by Robbins and Schwartz as an efficient isotropic etchant of silicon [8]. However, previous researchers have suggested that etchant temperature and agitation must be extremely well regulated to produce consistent, isotropic cavities. To conduct etches, two HNA solutions were mixed at ratios of 20:70:10 H:N:A and 10:70:20 H:N:A. Previous results had indicated these acid ratios were not overly aggressive while still offering an acceptably high etch rate and smooth surface finish [9, 10]. 26 R.M. Dowden et al.
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